Question #7146d

1 Answer
Feb 12, 2016

It is an output of XOR (Exclusive OR) gate
![learningelectronics.net](useruploads.socratic.org)

Explanation:

Truth table for 2 input NAND gate.

![ibiblio.org](useruploads.socratic.org)
Applying to each of the NAND gates of the given figure we obtain the following table:

A = 0, B = 0, Y = 0
A = 0, B = 1, Y = 1
A = 1, B = 0, Y = 1
A = 1, B = 1, Y = 0

This is the truth table for XOR (Exclusive OR) gate.

#"Y"="A"o+"B"=bar"A""B"+"A"bar"B"#